AMD Namedrops EPYC “Venice” Zen 6 and EPYC “Verano” Zen 7 Server Processors

AMD at its 2025 Advancing AI event name-dropped its two next generations of EPYC server processors to succeed the current EPYC “Turin” powered by Zen 5 microarchitecture. 2026 will see AMD debut the Zen 6 microarchitecture, and its main workhorse for the server segment will be EPYC “Venice.” This processor will likely see a generational increase in CPU core counts, increased IPC from the full-sized Zen 6 cores, support for newer ISA, and an updated I/O package. AMD is looking to pack “Venice” with up to 256 CPU cores per package.

AMD is looking to increase the CPU core count per CCD (CPU complex die) with “Zen 6.” The company plans to build these CCDs on the 2 nm TSMC N2 process node. The sIOD (server I/O die) of “Venice” implements PCI-Express Gen 6 for a generational doubling in bandwidth to GPUs, SSDs, and NICs. AMD is also claiming memory bandwidth as high as 1.6 TB/s. There are a couple of ways they can go about achieving this, either by increasing the memory clock speeds, or giving the processor a 16-channel DDR5 memory interface, up from the current 12-channel DDR5. The company could also add support for multichannel DIMM standards, such as MR-DIMM and MCR-DIMMs. All said and done, AMD is claiming a 70% increase in multithreaded performance over the current EPYC “Turin,” which we assume is comparing the highest performing part to its next-gen successor.

Next up, AMD unveiled the 2027 successor of “Venice,” the 7th Gen EPYC “Verano.” This processor introduces the future “Zen 7” microarchitecture for even higher IPC, support for even newer instruction sets. At this point, it’s not clear if AMD will dial up CPU core counts beyond the up to 256/package of “Venice,” but we’re hearing that “Verano” will retain the Socket SP7 infrastructure of “Venice,” which means it will likely retain the memory and PCIe interfaces introduced by “Venice.” The company understandably did not get into the nuts and bolts of “Verano,” saving it for the 2026 Advancing AI event.

AMD isn’t just selling these processors, but also timing their launch with its latest AI GPUs. The current EPYC “Turin” CPU is paired with MI355X AI GPUs, and Pensando “Pollara 400” NICs for an industry standard server rack package. The 2026 package combines “Venice” CPUs with next-generation MI400 series AI GPUs and “Vulcano” NICs. AMD is referring to this package as “Helios.” Then in 2027, the company will time the launches of its EPYC “Verano” CPUs with those of the MI500 series AI GPUs, while carrying over “Vulcano” NICs.