Gaming

Apple To Utilize TSMC’s Advanced WMCM And SoIC Packaging For Its A20 And Server Chips, Respectively, With Monthly Production Estimated To Reach 10,000 Wafers In 2026

Apple To Utilize TSMC’s Advanced WMCM And SoIC Packaging For Its A20 And Server Chips, Respectively, With Monthly Production Estimated To Reach 10,000 Wafers In 2026

The first 2nm chipsets are scheduled to arrive next year, with Apple likely being the first to showcase this technology when it announces the A20 and A20 Pro in the iPhone 18 series. However, aside from showcasing TSMC’s next-generation manufacturing process, the Cupertino will reportedly be shifting to two new packaging forms in 2026. A new report states that for the A20 and A20 Pro, the company will move to WMCM (Wafer-Level Multi-Chip Module) packaging, while the Taiwanese semiconductor giant’s SoIC (System on Integrated Chips) will be leveraged for Apple’s server chips.

TSMC will set up two production facilities for Apple for the A20 and server chips, with the report stating that these sites have been labeled P1 and AP6, respectively

The WMCM packaging for the A20 and A20 Pro has been talked about previously, where it was stated that this technology will maintain the footprint of both chipsets while having immense flexibility in combining different components. Apple can add multiple dies, such as the CPU, GPU, memory, and other parts, at a wafer level, before being sliced into individual chips. This packaging will enable the firm to mass manufacture smaller and more efficient SoCs.

According to DigiTimes, TSMC will set up a dedicated production line at its Chiayi P1, with an initial target of 10,000 monthly wafers. The report does not mention if any other company apart from Apple will take advantage of WMCM packaging, but the California-based titan also has its eyes set on its server chips. However, instead of leveraging the same technology as the A20 and A20 Pro, Apple is said to utilize TSMC’s SoIC packaging, combining two advanced chips stacked directly on each other.

This process allows for ultra-dense connections between the stacked chips, resulting in reduced latency, increased performance and boosted efficiency. TSMC and Apple have previously been reported to be exploring this packaging, and there is a possibility that the technology debuts in the M5 Pro and M5 Max. As for the SoIC server chips, these are said to be mass produced at TSMC’s Zhunan AP6 facility, with manufacturing expected to ramp up by the end of 2025.

News Source: DigiTimes

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